In this paper, we propose a parameter design algorithm using graph neural networks (GNNs) to solve the difficulties in designing large-scale superconducting quantum computing chips. The algorithm is based on a 'three-step scaling' mechanism and consists of two neural network models: a supervised learning-based estimator applied to medium-sized circuits and an unsupervised learning-based designer applied to large-scale circuits. By applying the algorithm to mitigate quantum crosstalk errors, we demonstrate that the error rate is reduced by 51% and the design time is shortened from 90 minutes to 27 seconds compared to the existing state-of-the-art algorithms in a large-scale superconducting quantum circuit with about 870 qubits. In conclusion, we present an algorithm with improved performance and scalability for superconducting quantum chip parameter design, and demonstrate the applicability of GNNs to superconducting quantum chip design.
